FMC172 FPGA Mezzanine Card

Wideband Low Latency FMC Module



Higher Performance, Low Latency, High Sample Rates

The Abaco FMC172 wideband low latency FMC module is based on the latest high performance ADC device from Texas Instruments and DAC devices from Teledyne-E2V. It is the fastest ADC Abaco offers with LVDS interfaces, delivering up to 6.4 GSPS ADC on a single channel (or two channels @ 3.2 GSPS) and a single channel DAC at up to 6.0 GSPS, making it among the fastest low-latency devices available on the market. The combination of the FMC172's >6.0 GHz bandwidth, its high sample rate and low latency is ideal for advanced Digital RF Memory (DRFM) systems.

When paired with Abaco's state-of-the-art FPGA carrier cards such as the VP889 or VP869, the FMC172 gives customers the platform to solve some of the most difficult challenges when designing modern DSP systems.

High Bandwidth

The FMC172 provides customers with another option to expand bandwidth for analog receivers and transmitters. The previous generation FMC170 supported one channel at 5GSPS in both input and output; the FMC172 extends this to 6.4GSPS at 10-bits, or two ADC channels at 3.2 GSPS. This is an excellent example of how the evolving FMC standard allows customers who invest in this powerful mezzanine-based architecture to continue to evolve their analog I/O FPGA based systems with minimal changes to their existing DSP and FPGA architecture.

Block Diagram


Form Factor
Analog Input, Analog Output
Data Rate
6400 Msps input (1 Ch), 3200 Msps input (2 Ch), 6000 Msps output
1 out, 1 or 2 in
FMC Connector

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Digital Signal Processing

Build an electronic warfare solution from the largest FMC portfolio on the market and leading edge DSP boards that are modular, minimize latency and come with built in security features—all built on open standards.

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FPGA DSP Board Support Package

Our FPGA DSP Board Support Package gives you complete control, flexibility and power to develop solutions for the most demanding DSP applications. It's built upon pre-validated IP blocks that have been designed to minimize FPGA resource utilization - giving you as much programmable logic for your application as possible.

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