Digital Signal Processing (DSP)

This document describes how to get started with the VP460. For more information on any of the hardware, software, or firmware, consult the relevant documentation listed under the Related Documentation section of this document.

The VP460 Software Board Support Package (BSP) includes two components. The first component is the VP460 Host Software running on either a Windows or Linux host computer. The second component is the VP460 PetaLinux BSP running on the VP460’s Zynq US+ RFSoC.

There is probably no one-size-fits-all design approach for ESM and SIGINT systems – but how should they be right-sized and optimized? This solutions brief provides some suggestions, and looks at the role RFSoC technology can play.

A 6U VPX RF processing system, the VP460 features the transformational Xilinx® Zynq® Ultrascale+™ RF system-on-chip (RFSoC) technology and the latest Xilinx Virtex™ Ultrascale+ High Bandwidth Memory (HBM) FPGA device. The RFSoC ZU29DR device used on the VP460 includes 16 integrated analog-to-digital converters at 2GSPS, 16 digital-to-analog converters at 6.4 GSPS, a user- programmable FPGA fabric, and multi-core Zynq ARM® processing subsystem.

Partial Reconfiguration allows FPGAs to dynamically change modules without disrupting other parts of the design. This white paper describes the special considerations throughout the design process when using the new Xilinx RFSoC technology.

In a rapidly changing technology environment, developers of advanced electronic warfare solutions face a sometimes bewildering array of choices. It’s not just about RF performance, though. Here, we describe some of the options and trade-offs.