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The PMC557 switch positions are defined in the following table:
Switch | Switch Position | Setting | Description |
SW1 | 1 | On | Used for hardware and firmware development purposes only. Do not modify. |
SW1 | 1 | Off | Used for hardware and firmware development purposes only. Do not modify. |
SW1 | 2 | On | Used for hardware and firmware development purposes only. Do not modify. |
SW1 | 2 | Off | Used for hardware and firmware development purposes only. Do not modify. |
SW1 | 3 | On | The host will be forced to retry any PCI access as long as firmware has not started. This allows to make sure that the PMC557 firmware has setup the configuration registers properly. A board without working firmware will cause the host to retry accessing the board forever! |
SW1 | 3 | Off | Disable forced PCI access retries. |
SW1 | 4 | On | The PMC557 embedded CPU will start after power up. This switch is used for development purposes only. Do not modify. |
SW1 | 4 | Off | The PMC557 embedded CPU will be held in RESET after power up. This switch is used for development purposes only. Do not modify. |
SW2 | All | On | This switch controls the timing and memory layout of the FLASH devices. It must not be changed since these values would make it impossible for the firmware to access the FLASH. |
SW3 | 1 | On | Enables write protect. When set on this will disable the write of data to the FLASH. That means that the firmware even cannot detect the FLASH IDs! |
SW3 | 1 | Off | Disables write protect. |